Unit 5: Registers, Counters, and the Memory Unit

5.1 Registers and Shift Registers

Registers

A register is a group of flip-flops, with each flip-flop capable of storing one bit of information. An n-bit register consists of a group of n flip-flops and is capable of storing any binary information of n bits.

Besides storing data, registers often have combinational gates that perform certain data-processing tasks. A simple register with only flip-flops is used for temporary storage and has parallel load capability.

Shift Registers

A shift register is a register capable of shifting its stored bits either left or right. It consists of a chain of flip-flops in cascade, where the output of one flip-flop is connected to the input of the next flip-flop. All flip-flops are driven by a common clock.

There are four basic types:

• SISO (Serial-In, Serial-Out): Data is loaded and read one bit at a time.
• SIPO (Serial-In, Parallel-Out): Data is loaded serially, but all bits can be read simultaneously. Used for converting serial data to parallel data.
• PISO (Parallel-In, Serial-Out): Data is loaded simultaneously, but read out one bit at a time. Used for converting parallel data to serial data.
• PIPO (Parallel-In, Parallel-Out): Data is loaded and read in parallel. This is the simple register mentioned above.

5.2 Counters: Ripple and Synchronous

A counter is a sequential circuit that goes through a prescribed sequence of states upon the application of input pulses. The pulses can be clock pulses.

Ripple Counters (Asynchronous Counters)

In a ripple counter, the flip-flop output transition serves as a source for triggering other flip-flops. The clock pulse is applied only to the first flip-flop (the LSB). The output of this flip-flop is connected to the clock input of the next flip-flop, and so on.

• Advantage: Simple construction.
• Disadvantage: They are slow because the clock pulse has to "ripple" through the chain of flip-flops. This causes a propagation delay which limits the maximum operating frequency.

Synchronous Counters

In a synchronous counter, the clock input of all the flip-flops is connected to a common clock signal. As a result, all flip-flops change their state simultaneously.

• Advantage: Much faster than ripple counters as the propagation delay is minimized.
• Disadvantage: More complex circuitry is required to control the state transitions.

The design of synchronous counters follows the general sequential circuit design procedure outlined in Unit 4.

5.3 Timing Sequences

The control unit in a digital computer initiates a sequence of micro-operations. The timing for these operations is controlled by a master clock generator. The clock pulses are applied to all flip-flops and registers in the system. The control unit generates control signals at specific times to perform the required operations.

A timing diagram is a graphical representation of the relationship between two or more digital signals as a function of time. It is used to analyze and visualize the operation of sequential circuits, showing the exact times at which signals change state relative to the clock.

5.4 The Memory Unit

The memory unit is a collection of storage cells together with associated circuits needed to transfer information in and out of storage. Memory stores binary information in groups of bits called words. A word is an entity of bits that moves in and out of storage as a unit.

Random Access Memory (RAM)

RAM is the main memory. The "random access" part means that any memory location can be accessed directly in roughly the same amount of time, regardless of its position in memory.

• Static RAM (SRAM): Retains its value as long as power is being supplied. It is faster but more expensive and less dense than DRAM. It is often used for cache memory. It is built using flip-flops.
• Dynamic RAM (DRAM): Stores each bit in a separate capacitor. Since capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically. It is slower but cheaper and denser than SRAM. It is used for the main system memory.

Memory Organization

A memory unit is specified by the number of words it contains and the number of bits in each word. For example, a memory of 1024 words with 16 bits per word is a 1K x 16 memory. This requires 10 address lines (since 2¹⁰ = 1024) and 16 data lines.