Unit 5: Digital Electronics
Difference between Analog and Digital Circuits
Electronics is divided into two primary domains based on the signals they process: Analog and Digital.
Analog Signal: A continuous signal that can take any value within a given continuous range over time.
Digital Signal: A discrete signal represented by binary states, typically 0 (Low voltage) and 1 (High voltage).
| Feature | Analog Circuits | Digital Circuits |
|---|---|---|
| Signal Nature | Continuous waves that change smoothly over time. | Discrete pulses representing binary states (0 and 1). |
| Noise Susceptibility | High. Even tiny fluctuations affect the signal quality directly. | Low. The logical state remains unchanged despite minor noise variations. |
| Accuracy | Prone to error due to component tolerance, temperature, and age. | Highly accurate and stable. |
| Storage Capacity | Difficult to store and transmit without degradation. | Easy to store and replicate precisely using memory cells. |
| Design Complexity | Harder to design; requires precise biasing and impedance matching. | Easier to design using systematic digital logic rules. |
| Examples | Operational amplifiers, radio tuners, analog audio systems. | Microprocessors, digital clocks, computer registers. |
Number Systems
Digital devices process representation values using different mathematical bases. The most important number systems in digital electronics are:
1. Decimal Number System
A base-10 number system that uses ten distinct digits from 0 to 9. Positional values are represented by powers of 10.
2. Binary Number System
A base-2 number system that uses only two digits: 0 and 1. Positional values are represented by powers of 2. It is the fundamental system used by logic gates.
3. Octal Number System
A base-8 number system that uses digits from 0 to 7. Since 8 = 23, three binary digits can be represented by a single octal digit.
4. Hexadecimal Number System
A base-16 number system that uses digits 0 to 9 and letters A to F (A = 10, B = 11, C = 12, D = 13, E = 14, F = 15). Since 16 = 24, four binary digits can be represented by a single hexadecimal digit.
5. Binary Coded Decimal (BCD)
BCD is a digital coding method where each individual decimal digit is encoded into its own 4-bit binary equivalent (using the standard 8421 weight scheme).
Crucial Concept - Binary vs BCD: Straight binary conversion converts the entire decimal number into binary. BCD converts each digit separately. For example, the decimal number 15 is:
- In Binary: 1111
- In BCD: 0001 0101 (where 1 is 0001 and 5 is 0101)
Number System Conversions
Decimal to Binary Conversion
To convert a decimal integer to binary, perform successive divisions by 2, recording the remainders until the quotient is 0. The first remainder represents the Least Significant Bit (LSB), and the last remainder represents the Most Significant Bit (MSB).
Example: Convert decimal 23 to binary
- 23 ÷ 2 = 11, remainder = 1 (LSB)
- 11 ÷ 2 = 5, remainder = 1
- 5 ÷ 2 = 2, remainder = 1
- 2 ÷ 2 = 1, remainder = 0
- 1 ÷ 2 = 0, remainder = 1 (MSB)
Reading the remainders from bottom to top, the binary result is 101112.
Binary to Decimal Conversion
To convert a binary number to decimal, multiply each binary digit by its corresponding power of 2, then sum the values.
Example: Convert binary 11010 to decimal
Value = (1 × 24) + (1 × 23) + (0 × 22) + (1 × 21) + (0 × 20)
Value = 16 + 8 + 0 + 2 + 0 = 2610
Logic Gates and Circuit Realizations
Logic gates are basic electronic components that perform logical operations based on Boolean algebra. They can be built using analog elements like diodes and transistors.
1. AND Gate
The output of an AND gate is High (1) if and only if all inputs are High (1).
Boolean Expression: Y = A · B
| Input A | Input B | Output Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Realization of AND Gate using Diodes:
Consider two diodes D1 and D2 connected in parallel. Their cathodes are connected to the input nodes A and B, respectively. Their anodes are tied together and connected to a positive voltage supply VCC through a pull-up resistor R. The output Y is taken from the common anode junction.
- Logic 0 Operation: If at least one input (A or B) is connected to 0V (Low), the corresponding diode becomes forward-biased (ON). Current flows through the resistor and the diode to ground, pulling the output voltage down to approximately 0.7V (Logical 0).
- Logic 1 Operation: If both inputs A and B are connected to VCC (High), both diodes are reverse-biased (OFF). No current flows through the resistor, meaning there is no voltage drop across R. Therefore, the output Y is pulled up to VCC (Logical 1).
2. OR Gate
The output of an OR gate is High (1) if one or more inputs are High (1).
Boolean Expression: Y = A + B
| Input A | Input B | Output Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
Realization of OR Gate using Diodes:
Two diodes D1 and D2 have their anodes connected to inputs A and B. Their cathodes are joined together and connected to ground through a pull-down resistor R. The output Y is measured at the common cathode junction.
- Logic 0 Operation: If both inputs are at 0V (Low), both diodes remain reverse-biased (OFF). No current passes through the resistor, so the output Y is held at 0V (Logical 0).
- Logic 1 Operation: If either input is connected to VCC (High), the corresponding diode becomes forward-biased (ON). Current flows from the input through the diode and the resistor R, raising the output voltage to VCC - 0.7V (Logical 1).
3. NOT Gate
The output of a NOT gate (Inverter) is the opposite state of its input.
Boolean Expression: Y = A'
| Input A | Output Y |
|---|---|
| 0 | 1 |
| 1 | 0 |
Realization of NOT Gate using a Transistor:
A NOT gate is built using an NPN bipolar junction transistor (BJT) configured as a common-emitter switch. The input A is connected to the base via a base resistor RB. The collector is tied to VCC through a collector resistor RC. The emitter is directly connected to ground. The output Y is taken from the collector.
- Input Low (Logical 0): When input A is 0V, no base current flows. The transistor is cut off (OFF) and acts as an open circuit. No current flows through RC, pulling the output Y up to VCC (Logical 1).
- Input High (Logical 1): When input A is VCC, the base-emitter junction is forward-biased. This drives the transistor into saturation (ON), acting as a closed switch to ground. The output Y is pulled down to collector-emitter saturation voltage (VCE,sat ≈ 0.2V, representing Logical 0).
Universal Gates (NAND and NOR)
NAND and NOR gates are termed Universal Gates because any logical function or basic gate (AND, OR, NOT) can be constructed solely from combinations of either gate type.
1. NAND Gate
Acts as an AND gate followed by a NOT gate. Output is Low (0) only when all inputs are High (1).
Boolean Expression: Y = (A · B)'
2. NOR Gate
Acts as an OR gate followed by a NOT gate. Output is High (1) only when all inputs are Low (0).
Boolean Expression: Y = (A + B)'
Realizing Basic Gates using NAND Gates
- NOT from NAND: Short both inputs of a NAND gate together.
Y = (A · A)' = A' - AND from NAND: Invert the output of a NAND gate using a second NAND gate configured as a NOT gate.
Y = ((A · B)')' = A · B - OR from NAND: Invert the inputs using NAND-NOT gates, and connect their outputs to the inputs of a third NAND gate.
Y = (A' · B')' = (A')' + (B')' = A + B (by De Morgan's Law)
Realizing Basic Gates using NOR Gates
- NOT from NOR: Short both inputs of a NOR gate together.
Y = (A + A)' = A' - OR from NOR: Invert the output of a NOR gate using a second NOR gate configured as a NOT gate.
Y = ((A + B)')' = A + B - AND from NOR: Invert the inputs using NOR-NOT gates, and connect their outputs to the inputs of a third NOR gate.
Y = (A' + B')' = (A')' · (B')' = A · B (by De Morgan's Law)
XOR and XNOR Gates
1. XOR (Exclusive-OR) Gate
The output of an XOR gate is High (1) if the inputs are different, and Low (0) if the inputs are the same.
Boolean Expression: Y = A ⊕ B = A'B + AB'
| Input A | Input B | Output Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
2. XNOR (Exclusive-NOR) Gate
The output of an XNOR gate is High (1) if the inputs are identical, and Low (0) if they are different.
Boolean Expression: Y = A ⊙ B = AB + A'B'
| Input A | Input B | Output Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Arithmetic Circuits (Half Adder and Full Adder)
Adders are fundamental combinational circuits used to perform binary addition.
1. Half Adder
An arithmetic circuit that adds two single-bit binary inputs, A and B. It produces two outputs: Sum (S) and Carry (C).
Sum (S) = A ⊕ B
Carry (C) = A · B
| Input A | Input B | Carry (C) | Sum (S) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
Limitation: A Half Adder cannot process a carry-in bit from a previous addition stage.
2. Full Adder
An arithmetic circuit that adds three single-bit inputs: two main bits (A, B) and a carry-in bit (Cin) from a preceding stage.
Sum (S) = A ⊕ B ⊕ Cin
Carry-out (Cout) = AB + BCin + ACin
| A | B | Cin | Cout | S |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 1 |
Realization of a Full Adder using two Half Adders:
A Full Adder can be constructed using two Half Adders and one OR gate.
- The first Half Adder adds A and B, producing an intermediate Sum (S1 = A ⊕ B) and an intermediate Carry (C1 = AB).
- The second Half Adder adds S1 and Cin, producing the final Sum (S = S1 ⊕ Cin = A ⊕ B ⊕ Cin) and a second intermediate Carry (C2 = S1 · Cin).
- The final Carry-out is formed by routing both intermediate carries through an OR gate:
Cout = C1 + C2 = AB + (A ⊕ B)Cin.
Binary Addition and Subtraction using 1's Complement
1. Binary Addition Rules
Binary addition follows these fundamental rules:
- 0 + 0 = 0
- 0 + 1 = 1
- 1 + 0 = 1
- 1 + 1 = 10 (which is 0 with a Carry of 1)
- 1 + 1 + 1 = 11 (which is 1 with a Carry of 1)
2. 1's Complement
The 1's complement of a binary number is obtained by inverting all its bits (replacing 1 with 0, and 0 with 1).
Example: The 1's complement of 110102 is 001012.
3. Binary Subtraction using 1's Complement
We can perform subtraction (A - B, where A is the minuend and B is the subtrahend) using 1's complement addition. This method avoids the need for borrowing logic.
Case A: Subtracting a smaller number from a larger number (A > B)
This results in a positive value.
- Find the 1's complement of the subtrahend (B).
- Add the 1's complement of B to the minuend (A).
- A carry-out (end-around carry) will be generated. Remove this carry from the MSB and add it to the LSB of the sum to get the final positive answer.
Example: Subtract 910 (10012) from 1210 (11002)
- Minuend (A) = 1100
- Subtrahend (B) = 1001
- 1's complement of B = 0110
- Perform addition:
1100 (A)
+ 0110 (1's comp of B)
--------
1 0010 (The leading bold 1 is the carry-out) - Apply the end-around carry:
0010
+ 1
--------
00112 (which is 310)
Case B: Subtracting a larger number from a smaller number (A < B)
This results in a negative value.
- Find the 1's complement of the subtrahend (B).
- Add the 1's complement of B to the minuend (A).
- No carry-out is generated. The resulting sum is negative and is in its 1's complement form.
- Invert the sum bits (take its 1's complement) and add a negative sign to obtain the final true magnitude.
Example: Subtract 1210 (11002) from 910 (10012)
- Minuend (A) = 1001
- Subtrahend (B) = 1100
- 1's complement of B = 0011
- Perform addition:
1001 (A)
+ 0011 (1's comp of B)
--------
1100 (No carry is generated) - Convert sum from 1's complement form:
Invert 1100 → 0011.
Assign a negative sign → -00112 (which is -310).