Unit 5: Arithmetic and Sequential Circuits
1. Introduction to Arithmetic Circuits
Arithmetic circuits are combinational logic circuits used to perform mathematical operations like addition and subtraction in digital systems. They use logic gates to process binary data bits.
2. Binary Addition: Half Adder and Full Adder
Addition is the most basic arithmetic operation in binary systems.
Half Adder
A Half Adder is a combinational circuit that adds two single-bit binary numbers. It produces two outputs: Sum and Carry.
[Image of Half Adder logic diagram and truth table]
Sum = A XOR B
Carry = A AND B
Full Adder
A Full Adder adds three binary bits: two significant bits and an incoming carry bit from a previous stage. It is used for multi-bit binary addition.
3. Binary Subtraction: Half and Full Subtractors
Binary subtraction can be performed using dedicated circuits or by using 1's complement addition.
- Half Subtractor: Subtracts one bit from another and produces two outputs: Difference and Borrow.
- Full Subtractor: Subtracts two bits and a borrow-in from a previous stage.
4. Introduction to Sequential Circuits
Unlike combinational circuits, sequential circuits have outputs that depend not only on current inputs but also on previous states. This is achieved using memory elements.
5. Flip-Flops: SR, JK, and MS-JK
A flip-flop is a basic memory element that can store one bit of binary data.
- SR Flip-Flop: The simplest type, with Set (S) and Reset (R) inputs. It has an invalid state when both inputs are 1.
- JK Flip-Flop: An improvement over the SR flip-flop that eliminates the invalid state. If J=1 and K=1, the output toggles.
- Master-Slave (MS) JK Flip-Flop: Designed to eliminate timing issues like the race-around condition by using two flip-flops in a master-slave configuration.
6. The Race-around Condition
In a JK Flip-Flop, when J=1, K=1, and the clock pulse is too long, the output may toggle multiple times within a single clock cycle. This unpredictable behavior is called the race-around condition. It is solved using edge-triggering or Master-Slave JK flip-flops.
7. Data Processing: Multiplexers and De-multiplexers
These circuits are used to route digital data between multiple sources and destinations.
- Multiplexer (MUX): A "data selector" that picks one of many input signals and sends it to a single output line based on select lines.
- De-multiplexer (DEMUX): A "data distributor" that takes a single input and routes it to one of many output lines.
[Image showing the operation of a 4-to-1 Multiplexer]
Exam Focus Corner
Frequently Asked Questions
- What is the difference between a Half Adder and a Full Adder?
A Half Adder adds two bits without considering a carry-in, while a Full Adder adds two bits plus an input carry.
- Explain the Race-around condition in a JK Flip-Flop.
It occurs when J=1, K=1, and the clock pulse width is larger than the propagation delay, causing the output to toggle repeatedly.
Common Mistakes
- SR Invalid State: Forgetting that S=1, R=1 is an forbidden/invalid state for a basic SR flip-flop.
- Complement Subtraction: When using 1's complement for subtraction, remember to add the "end-around carry" to the result.
Exam Tips
Tip: Always draw the Truth Table first when asked to design or explain a logic circuit. For flip-flops, clearly distinguish between the "Set", "Reset", "No Change", and "Toggle" states as these are standard marks-earning keywords.